[1]
Anjaiah Talamala et al. 2025. Implementation of An Ultra-Low-Power High-Speed CLB Using A Memory Element And Its Power Dissipation Analysis for FPGA with Quantum-dot Cellular Automata. International Journal of Computational and Experimental Science and Engineering. 11, 1 (Feb. 2025). DOI:https://doi.org/10.22399/ijcesen.1066.