ANJAIAH TALAMALA; PATRO, Ajit Kumar; PINNINTI, Kishore. Implementation of An Ultra-Low-Power High-Speed CLB Using A Memory Element And Its Power Dissipation Analysis for FPGA with Quantum-dot Cellular Automata. International Journal of Computational and Experimental Science and Engineering, [S. l.], v. 11, n. 1, 2025. DOI: 10.22399/ijcesen.1066. Disponível em: https://ijcesen.com/index.php/ijcesen/article/view/1066. Acesso em: 22 feb. 2025.